The manufacture of a semiconductor wafer requires many steps, often more than 100. Of these some thirty or more may be related to cleaning the wafer between processing steps. Among the most important of these cleaning steps are those related to post-etch cleaning.
In the process sequence of wafer manufacture, etching typically occurs after masking. One method of masking is through the process of applying a thin film of "photoresist", a light-sensitive polymer, over a previously processed layer on the surface of a wafer and then exposing the photoresist to an intense light through a "mask" which is simply a photographic image of the feature to be created in the etching step. After exposure, the photoresist is "developed", after which the unexposed photoresist may be removed. This is typically followed by a baking step which hardens remaining photoresist. The wafer is then ready for the etching step.
During the etching step, material in layers of the wafer not protected by the hardened photoresist is removed. A goal of certain etching steps is that the etching away of the material be "anisotropic"; i.e., that it occur in one direction, typically orthogonally to the plane of the surface of the wafer. Two known types of etching used in semiconductor manufacturing are chemical etching and physical or "dry" etching. Chemical etching steps are not anisotropic; that is, as the etchings chemical dissolves unprotected material in the layer to be etched orthogonally, it also dissolves material in the layer to be etched from the sidewall of the cavity being created thus creating sidewalls which are not perpendicular. In other words, it erodes away material from underneath the hardened photoresist. Physical etching, a process whereby the material of the layer to be etched is bombarded with high energy ions, is, on the other hand, much more anisotropic and is currently the method of choice for high density wafer manufacture when anisotropic etching is desired.
Physical etching, however, engenders other problems. Because of the extremely high energy of the ions to which the wafer is subjected, undesirable chemical compounds may be formed by reaction of the high energy ions with the metals and other materials of the layers of which the wafer is constructed. The nature of these chemical compounds formed is dependent on the type of ions used to bombard the wafer and on the materials used to construct the particular layers of the device being manufactured. For example, fluorine and chlorine chemistries are common high energy ion sources in modem semiconductor manufacture and the layers of many types of semiconductor wafers typically include materials such as titanium, aluminum, tungsten and silicon. Thus, fluorides or chlorides of titanium, aluminum, tungsten and silicon may be formed during physical etching of wafers containing these elements. Many of the chlorides and fluorides formed are volatile under etching conditions and very quickly move away from the etching area causing no problems. Along with these volatile compounds, however, some non-volatile native metal has also been known to be sputtered into unwanted areas of layers being etched by the high energy ions. Being non-volatile, these sputtered metals tend to adhere to the interior surfaces of the cavity being created during etching.
In addition to the formation of volatile compounds and sputtered native metals during etching, a variety of non-volatile compounds have been known to be formed by reaction of the aforementioned elements with the high-energy ions. These non-volatile compounds, like the native metals, also tend to deposit on and adhere to the interior surfaces of the cavity being created during the etching step. It is desirable to remove these unwanted metal and non-volatile compound residues before the wafer manufacturing process can continue after etching.
By way of example and not limitation, three types of dry etching processes which are subject to residue formation are via etching, pattern etching and small contact hole etching.
Vias are holes etched between metal layers on a wafer to permit creation of an electrical connection between the layers by later filling the via with a conducting material. The unwanted residues within a via can interfere with the creation of the electrical connection thereby adversely affecting the operation of the circuit being created.
Pattern etching is the process of etching channels in a metal layer to form a circuit, which corresponds to the "wiring" of a traditional electrical circuit. Unwanted residues may clog a channel e.g. create a discontinuity in the channel (the equivalent of a "broken wire") or may form a bridge between two or more channels (creating, in essence, a "short circuit").
Small contact hole etching is similar to via etching except that, rather than being formed to provide contact between metal layers, small contact holes provide for physical contact between layers of silicides, a procedure which is typically used in the formation of transistors. During small contact hole etching a layer of photoresist polymer often forms at the bottom of the etched cavity. Since this polymer is typically non-conductive; i.e., it is an insulator, if left in place, it could result in the failure of the packaged device.
In most semiconductor fabrication techniques, once etching is complete, the remaining photoresist is removed by dry ashing, the use of high energy plasmas to, in effect, burn the hardened photoresist from the surface of the wafer. What is left after ashing is an etched wafer which may contain unwanted native metal and non-volatile compound residues within vias, pattern etches and small contact holes as well as mounds of the unwanted residues at the edges of these areas due to the native metal and non-volatile compounds which had adhered to the edges of the photoresist feature during etching.
A common known method for removal of residues from etched surfaces is chemical wet cleaning. However, chemical wet cleaning is fraught with problems. The chemicals used must be of exceptionally high purity and therefore are very expensive. Furthermore, many of the chemicals used are extremely hazardous, both to human health and safety and to the environment. For instance, commonly used wet cleaning procedures employ chemicals such as sulfuric acid, nitric acid, hydrofluoric acid, hydrochloric acid, phosphoric acid, ammonium hydroxide, hydrogen peroxide and a variety of organic solvents. Not only are these chemicals dangerous to workers and to the environment, they pose a monumental disposal problem. In addition, chemical wet cleaning procedures tend to use enormous amounts of water; e.g., in most cases a water wash is necessary between each chemical cleaning step and a very thorough final rinse is required when cleaning has been completed. It has been estimated that a typical semiconductor manufacturer may use as much as six million gallons of water per day, with wafer cleaning procedures accounting for much of the water used.
Another problem with wet cleaning is throughput. That is, wet cleaning is typically a time-consuming multi-step process involving several chemical cleaning and water rinsing cycles. For example, the wet-cleaning procedure known as RCA cleaning can involve ten or more steps, uses sulfuric acid, hydrogen peroxide and ammonium hydroxide and can take an hour or more to complete a full cleaning cycle. The wafer drying step, after cleaning and rinsing are done, can alone consume 10-15 minutes.
A particularly troublesome problem arises during wet cleaning of vias when the water used to rinse the wafer is hot. The problem also occurs when a hot water dip is used as the sole method of removing residues, an approach which can be used when the residues are water-soluble. The problem is Boehmite, aluminum oxide, formation. Dipping a wafer into 100.degree. C. water for one to two seconds is enough time to create enough Boehmite to form to completely fill a via. Since Boehmite is non-conductive; that is, is an insulator, this can result in failure of the semiconductor device. In addition to Boehmite formation, the use of hot water dips necessitates a wafer drying step which, as previously noted, can be a very time-consuming step.
Finally, as semiconductors become more densely packed with circuitry and the channels and holes etched become more minute, a cleaning procedure must be capable of removing smaller and smaller residue particles. The removal of residue particles less than 0.1 micron in size is becoming routinely desirable. However, it has been suggested that wet cleaning processes may reach their limit of utility at particles of about 0.2 micron in size.
While a few dry cleaning processes are known, they also are not without problems. For instance, as noted previously, during small contact hole etching, a polymeric insulating layer often forms on the surface of the silicide at the bottom of the etched cavity. This polymer is non-volatile and quite refractory and requires substantial energy to remove. A dry cleaning process presently used to remove this polymer residue consists of sputtering the oxide off the silicide with energized argon ions. However, when the contact hole is less than 0.25 microns in diameter, which is becoming very common, this method is ineffective due to the limited angle of incidence of the ion beam which can be achieved.
Furthermore, existing dry cleaning processes generally involve the use of relatively reactive species. For instance, the use of reactive gaseous radicals formed from process gases such as ClF.sub.3 and HF has been proposed. In another procedure, laser light and propelled gases such as nitrogen and argon are used to remove sputtered residues. These methods and materials are sufficiently high in energy and reactivity to themselves attack the sidewalls and metal layers of etched surfaces thus damaging the wafer while cleaning it.
In contrast, the apparatus and method of the present invention provide for the safe, rapid, efficient, economical and relatively low energy dry cleaning of residues from post-etch wafers.